DIP, Meet ARM!

This one kind of caught me off guard when I first heard about it, but NXP recently announced that they would be making their low-power, low-cost 32-bit ARM Cortex M0 chips available in a variety of new hand-solderable packages, including the venerable DIP. I don’t know if this is a first, but there definately can’t be that many ARM chips out there in DIP … but the more the merrier where hobbiests are concerned. The LPC1114 runs at speeds up to 50MHz, has 32KB Flash and 8KB SRAM, and is ridiculously cheap in it’s currently available packages … DIP packaging is bound to be more expensive (the dies on these chips are a small fraction of the cost compared to large packaging like that), but I’m curious what price tag they put on them. NXP has been extremely aggressive with their current M0 pricing, and these chips are clearly aimed at the very cost-sensitive Chinese market (since the cheapest goods are still all hand-assembled), so I’d expect to be the price to be quite attractive. You can read all the marketting-speak about it here in the original press release.

Filed under: Uncategorized — by Kevin, posted November 5, 2011 at 9:25 pm

Comments (5)

5 Comments

On behalf of everyone who fears/loathes surface-mount soldering (myself included) I’ll be the first to say… YAY!
~Joe

Comment by Joe — November 5, 2011 @ 9:59 pm

I’LL TAKE TWENTY!

Comment by Brian — November 5, 2011 @ 10:04 pm

First the DIP PIC32s, now this. BRB, mind officially blown. Isn’t it great living in the future?

Comment by PhilB — November 6, 2011 @ 12:42 am

Didnt Stellaris ( now TI ) produce an Cortex M0 very early on with like 28 pins in SOIC ? Just to show it can be done.

LM3S101 and LM3S102

Comment by kert — November 6, 2011 @ 12:24 pm

One possible disadvantage of the dip packaging is that it may not allow support of a JTAG debugger. Of course they could package a slightly larger device on a dip adapter with a JTAG connector on the adapter, but these devices would come at a higher price since they wouldn’t sell as many of them.

Looking back in time, the DIP package wasn’t always limited to low pinout packages. There were (and still are) 600 mil wide packages with up to 48 pins, and a 900 mill wide dip once supported 64 pins. There were also some ‘quad inline’ packages (dips with 50 mill spaced pins with body offsets of 0 and 100 mils) with even more pins.

Comment by K Scharf — November 7, 2011 @ 10:02 am

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